Received: from out.migadu.com (out.migadu.com [91.121.223.63]) by nld3-dev1.alpinelinux.org (Postfix) with ESMTPS id B96D6781926 for <~alpine/apk-tools@lists.alpinelinux.org>; Wed, 19 Feb 2020 04:45:14 +0000 (UTC) Received: (Migadu outbound); Wed, 19 Feb 2020 04:45:13 +0000 Authentication-Results: out.migadu.com; auth=pass (plain) Received: from wms1-eu-central.migadu.com (wms1-eu-central.migadu.com [172.104.244.218]) by out.migadu.com (Haraka/2.8.16) with ESMTPSA id D520C0D0-3563-40A0-8E4C-0E0C021784A1.1 envelope-from (authenticated bits=0) (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 verify=FAIL); Wed, 19 Feb 2020 04:45:13 +0000 MIME-Version: 1.0 Date: Wed, 19 Feb 2020 04:45:13 +0000 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: RainLoop/1.12.1 From: "Ariadne Conill" Message-ID: Subject: Architecture names for ILP32 ABIs on 64-bit CPUs To: ~alpine/apk-tools@lists.alpinelinux.org DKIM-Signature: v=1;a=rsa-sha256;bh=MshNP4vZHNfVFgsnIfdm10HJBhWwBx5dUk727pza/zo=;c=relaxed/simple;d=dereferenced.org;h=from:subject:date:to;s=default;b=MPAwB7WAUyfPeEvEXspXk/432GwxuJmb6fIYHVINK5qehon3GfBsowU36m4EElZROZGElA+rq5RakvQrZb/X0lkxPHATH3MV/sn6aRcTg7BkwHol+TbBLok/fcyi/yq53dDQMIcdshU4DPiSHtHEyWf2erP23/nslIUZPclVQEo= Hello,=0A=0AAs you may or may not be aware, there is a new x86 ABI that p= rovides=0Aa 32-bit memory model on x86_64 called x32, which provides the = more=0ARISC-like calling convention that x86_64 uses with 32-bit pointers= .=0A=0AARM is also making such a userspace ABI for aarch64.=0A=0AI would = like to target both of these ABIs for a future Alpine=0Arelease (probably= 3.13/4.0), as I believe they will be useful for=0Acontainers. I am sure= other apk-tools consumers are also interested=0Ain such ABIs.=0A=0ABut t= o do so, we must first determine what the sub-architecture=0Ashould be ca= lled.=0A=0ARight now, on x86 we have x86 and x86_64.=0A=0AARM is, well, a= mess by comparison, over there, we have:=0A=0A- armel (deprecated): ARMv= 5 little-endian=0A- armhf: ARMv6 little-endian, hard float=0A- armv7: ARM= v7, hard-float=0A- aarch64: ARMv8, 64-bit, hard-float=0A=0AMy thoughts so= far are to use x86_64-ilp32 and aarch64-ilp32 as=0Athe architecture name= . But maybe somebody has a better suggestion?=0A=0AAriadne